View ENH050QA1-320_3049398.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

ENH050QA1-320/450/600 original speci? cations created by sharp. 1 display systems division ? hillsboro, or ? (503) 690-2460 ? www.wedc.com white electronic designs corp. reserves the right to change products or speci? cations without notice. january 2006 rev. 1 white electronic designs display systems division ENH050QA1-320/450/600 color tft-lcd module features slim, lightweight and compact 1. active area/outline area=70% 2. thickness: 16.5mm 3. mass: 200g (max) built-in video interface circuit and control circuit responsive to two sets of standard rgb analog video signals. reduced re? eciton as a resuld of low re? ectance black-matrix and index matching (im) ? lm lamination. im is available in two surface treatments, im/clear (glossy) and im/110 (10% diffusion). it is possible to use both the simultaneous and the independent time sampling. an external clock mode is available. optical viewing angle: wide view angle (6 o'clock direction.) (customer can use this module as a 12 o'clock viewing direction type by using a display rotating function to rotate right/left and up/down scanning direction electrically.) this module includes a high luminance edge light that is excellent at low temperature. it is possible to use the dimming frequency (pwm) for backlight. construction and outline outline dimensions of tft-lcd module: see fig. 3 the module consists of a tft-lcd panel, driver ic's control pwb mounted with electronic circuits, edge light, frame, front and rear shielding cases. (backlight driving dc/ac inverter is not built in the module.) general description wedc provides optically enhanced solutions to the standard sharp lq5aw136 color active matrix lcd module. the ? rst enhancement is an index matching (im) ? lm lamination to the front surface of the display polarizer. the im ? lm is available in two surface treatments - im/clear and im/110 (a 10% diffusion).the second enhancement is the incorporation of a re? ective polarizer (rp) to improve brightness by up to 40%. the third enhancement is the addition of prism ? lms (rpp) further increasing the brightness of the display. the module accepts full color video signals conforming to the ntsc(m) and pal(g-b) system standards. it can withstand an intense environment, the online dimension is suitable for an automotive display, compact size, compatible with 2din size. wedc assumes no responsibility for any damage resulting from the use of the device which does not comply with the instructions and the precautions speci? ed in these speci? cation sheets. wedc does assume the responsibility for the warranty of the enhanced product. features dual mode type. [ntsc(m) and pal(b-g) standards] mbk-pal enables the 234-scanning lines panel to display a picture with virtually 273-scanning lines. tft-active matrix-lcd drive system with high contrast. 74,800 pixels (rbg stripe con? gurations and full color) 5" diagonal size. mechanical specifications parameter speci? cations units display format 74,800 pixels 960 (w) x rgb x 234 (h) dots active area 102.2 (w) x 74.8 (h) mm screen size (diagonal) 13 (5") cm dot pitch 0.1065 (w) x 0.3195 (h) mm dot con? guration rgb stripe con? guration - outline dimension (1) 126.8 (w) x 89.6 (h) x 16.5 (d) mm mass 200 (max) g note: this measurement is typical, and see fig. 3 for details.
ENH050QA1-320/450/600 original speci? cations created by sharp. 2 display systems division ? hillsboro, or ? (503) 690-2460 ? www.wedc.com white electronic designs corp. reserves the right to change products or speci? cations without notice. january 2006 rev. 1 white electronic designs display systems division ttl-lcd panel driving section (hi means digital input voltage, lo means gnd.) pin no. symbol i/o description remarks 1 hsy i, o input/output horizontal sync. signal (low active) (1) 2 vsy i, o input/output vertical sync. signal (low active) (2) 3 pwm o terminal for output pwm of dimming back light (3) 4 ntp i terminal for display mode change of ntsc and pal (4) 5 hrv i turning the direction of horizontal scanning (5) 6 vrv i turning the direction of vertical scanning (6) 7 vsw i selection signal of two sets of video signals (7) 8 sam i terminal for sampling mode change (8) 9v cdc i dc bias voltage adjusting terminal of common electrode driving signal (9) 10 vsh i positive power supply voltage 11 vbs i composite video signal of sync. seperator (10) 12 brt i brightness adjusting terminal (11) 13 vr1 i color video signal (red) 1 positive (on when vsw=hi.) 14 vg1 i color video signal (green) 1 15 vb1 i color video signal (blue) 1 16 vsl i negative power supply voltage 17 vr2 i color video signal (red) 2 positive (on when vsw=lo.) 18 vg2 i color video signal (green) 2 19 vb2 i color video signal (blue) 2 20 gnd i ground 21 ckc i change the input/output direction of ck, hsy and vsy. (12) 22 ck i, o input/output clock signal (13) input terminals and their descriptions note: 1. if ckc='hi', this terminal outputs horizontal sync. signal in phase with vbs. if ckc='lo', this terminal will be external horizontal sync. input terminal. 2. if ckc='hi', this terminal outputs vertical sync. signal in phase with vbs. if ckc='lo', this terminal will be external vertical sync. input terminal. 3. pwm signal is used for the pwm dimming frequency and it is easy to get pwm signal dimming by combining both hsy and pwm sign als. but use this pwm signal in case of input standard ntsc or pal signal. 4. this terminal is to switch the display mode, and it is ntsc mode when ntp is 'high' and is pal mode when ntp is 'low'. 5. when this terminal is 'high', it will be normal and when it is 'low', it will display reversely on the horizontal direction. 6. when this terminal is 'high', it will be normal and when it is 'low', it will display reversely on the vertical direction. 7. this terminal is to switch input for groups of rgb color video signals, and input 1 (no. 13 to 15) is selected when vsw is ' high' and input 2 (no. 17 to 19) is selected when vsw is 'low'. 8. this terminal switches to sampling mode. it is the independent data-sampling timing at rgb dot when sam is 'high' and it is the simultaneous data-sampling timing at rgb dots when sam is 'low'. 9. this terminal is applicable to the dc bias voltage adjusting terminal of the common electrode driving signal. if power suppl y voltage is typical, it is not necessary to re-adjust it. so, use it in the open condition. however, in the case that the power supply voltage is changed, or power supply voltage is red uced, adjust it externally to get the best contrast with a resistor that is added to this terminal, or semi-? xed resistor, vcdc in module. a recommended circuit is shown in fig. 5. 10. the sync. signal which will be input, is negative polarity and is applicable to standard composite sync. signal, negative one in the same pulse level. 11. dc voltage supplied to this terminal, makes the brightness of the screen adjustable, which is the black level of the video signal. although this is adjusted in the time of delivery to get the best display in the condition of the open terminal, it is also able to be re-adjusted externally with a resistor that c an be added to this terminal, or a semi-? xed resistor, brt, in module. a recommended circuit is shown in fig. 5. 12. ckc-'hi', ck.hsy.vsy terminals are output mode. ckc='lo': ck. hsy. vsy terminals are input mode. 13. if ckc='hi', this terminal outputs the clock for sure drivers. if ckc='lo', this terminal will be the external clock input terminal.
ENH050QA1-320/450/600 original speci? cations created by sharp. 3 display systems division ? hillsboro, or ? (503) 690-2460 ? www.wedc.com white electronic designs corp. reserves the right to change products or speci? cations without notice. january 2006 rev. 1 white electronic designs display systems division functional machine and input/output mode parameter symbol min max unit positive power supply voltage v sh -0.3 +9.0 v negative power supply voltage v sl -6.0 +0.3 v analog input signals (1) v i - 2.0 vp-p digital input/output signals (2) v i -0.3 +5.4 v dc bias voltage of common electrode driving signal v cdc v sl v sh v brightness adjusting terminal v brt 0 +5.1 v storage temperature (3) t stg -30 85 c operating temperature (3, 4) surface of panel top1 -30 85 c environment top2 -30 60 c absolute maximum ratings gnd = ov, t a = 25c notes: 1. vbs, vr1, vg2, vb1, vr2, vg2, vb2 terminals (video signal) 2. ntp, hrv, vrv, sam, vsw, hsy, vsy, ckc, ck terminals 3. the temperature of all parts in module should not exceed this rating. maximum wet-bulb temperature should be less than 58c. no dew condensation. ckc="hi" ckc="lo" terminal sam="hi" sam="lo" sam="hi" sam="lo" hsy output output input input vsy output output input input ck output "dot clock" output "pixel clock" input "dot clock" input "pixel clock" backlight driving section terminal no. symbol i/o function cn1 1 2 3 vl1 i input terminal (hi voltage side) [14] nc - non connection vl2 i input terminal (low voltage side) note: 14. low voltage side of dc/ac inverter for backlight driving connects with ground of inverter circuit.
ENH050QA1-320/450/600 original speci? cations created by sharp. 4 display systems division ? hillsboro, or ? (503) 690-2460 ? www.wedc.com white electronic designs corp. reserves the right to change products or speci? cations without notice. january 2006 rev. 1 white electronic designs display systems division electrical characteristics recommended operating conditions tft-lcd panel driving section gnd=0v, t a =25c parameter symbol min typ max unit remarks positive power supply voltage v sh +7.8 +8.0 +8.2 v (1) negative power supply voltage v sl -5.2 -5.0 -4.8 v analog input voltage amplitude v bs 0.7 1.0 2.0 vp-p input resistor is over 10k ?. v i - 0.7 - vp-p (2) dc component v idc -1.0 0 -1.0 v (3) digital input voltage high level v ih -3.7 - +5.1 v input resistor is over 10k ? . (4) low level v il 0 - +1.0 v histeresis v h 0.4 - - v digital output voltage high level v oh +4.0 - +5.5 v load resister is over 60k ? . (5) low level v ol 0 - +1.0 v output clock duty cycle duty 45/55 50/50 55/45 - ckc=high (6) (7) drive capability i oh - - 0.25 ma i ol -0.28 - - ma input horizontal sync. component freq. ntsc f h (n) 15.13 15.73 16.33 khz ckc=high (8) for vbs terminal pal f h (p) 15.03 15.63 16.23 khz pulse width ntsc t hi (n) 4.2 4.7 5.2 s pal t hi (p) 4.2 4.7 5.2 s rise time tr hi1 - - 0.5 s fall time tf hi1 - - 0.5 s input vertical sync. component freq. ntsc f v (n) f h /284 f h /262 f h /258 hz ckc=high, h=1/f h (9) for vbs terminal pal f v (p) f h /344 f h /312 f h /304 hz pulse width ntsc t vi (n) - 3h - s pal t vi (p) - 2.5h - s rise time tr vi1 - - 0.5 s fall time tf vi1 - - 0.5 s input clock frequency f cli 18.2 18.9 19.6 mhz ckc=low (10) for ck terminal f cli 6.0 6.8 7.6 mhz high width t wh 20.0 - - ns low width t wl 20.0 - - ns rise time tr cli - - 5.0 ns fall time tf cli - - 5.0 ns input hsy (horizontal sync.) frequency f hi f cli /1230 f cli /1200 f cli /1170 hz ckc=low (11) for ck terminal f hi f cli /465 f cli /435 f cli /405 hz pulse width t hi 1.0 4.7 8.4 s rise time tr hi1 - - 0.05 s fall time tf hi1 - - 0.05 s input vsy (vertical sync.) frequency f vi 50 f hi /262 f hi /258 hz ckc=low for vsy terminal pulse width t vi (p) 1h 3h 5h s rise time tr vi1 - - 0.5 s fall time tf vi2 - - 0.5 s data set up time t su1 25 - - ns (13) ckc=low data hold time t ho1 25 - - ns data set up time t su2 1.0 - - s (14) data hold time t ho2 1.0 - - s v oh =2.6v v ol =2.3v sam=high sam=low sam=high sam=low (12)
ENH050QA1-320/450/600 original speci? cations created by sharp. 5 display systems division ? hillsboro, or ? (503) 690-2460 ? www.wedc.com white electronic designs corp. reserves the right to change products or speci? cations without notice. january 2006 rev. 1 white electronic designs display systems division tft-lcd panel driving section parameter symbol min typ max unit remark dc bias voltage for common electrode driving signal v cdc 0 +2.0 +3.0 v dc component (15) terminal voltage applicable to brightness v brt +2.0 +2.3 +2.4 v notes: 1. power supply voltage should not be changed after adjusting v cdc . 2. vr1, vg1, vb1, vr2, vg2, vb2 terminal (video signal) 3. vbs, vr1, vg1, vb1, vr2, vg2, vb2 terminals 4. hsy, vsy, ntp, vsw, hrv, vrv, sam ckc, ck terminal 5. hsy, vsy, ck terminals (output mode) 6. ck terminals (output mode) 7. duty cycle is de? ned as follows. 8. vbs (horizontal sync. component) 9. vbs (vertical sync. component) 10. ck (input mode) 11. hsy (input mode) 12. vsy (input mode) 13. in case of ckc='lo', it shows the phase different from hsy to ck. in that case, hsy will be taken at the rise timing of ck. 14. in case of ckc='lo'. it shows the phase difference from vsy to hsy. in that case, vsy will be taken at the rise timing of hsy. 15. adjsuting the optimal voltage on every module at the typical value of power supply voltage to get the maximum value of contrast. however, in the case that the power supply voltage is changed, for example the level of power supply voltage is reduced, adjust it externally to get the best contrast with a resistor you add to this terminal, or semi? xed resistor, v cdc , in module. a recommended circuit is shown in fig. 5. t oh t ol duty=t ol /t oh backlight driving section parameter symbol min typ max unit remark lamp voltage v l7 550 610 670 vrms il=6.5marms lamp current i l 3.0 6.5 7.0 marms normal operation lamp frequency f l 20 - 70 khz kickoff voltage v s - - 1450 vrms t a = +25c - - 1500 vrms t a = -30c power comsumption t a = 25c parameter symbol conditions min typ max unit remark positive supply current i sh v sh = +8.0v v sl = -5.0v - 140 170 ma negative supply current i sl -5570 ma total w s - 1.4 1.7 w (16) lamp power consumption w l normal driving - 4.0 - w (17) 16. excluding backlight section 17. reference data by calculation (i l x v l x 1: number of lump) circuit diagram the circuit block diagram of tft-lcd module is shown in fig. 4. brt, vcdc, external adjusting recommended circuit is shown in fig. 5. caution: turn the power supply on or off (vsh and vsl) at the same time. be careful to supply all power voltage before inputting signals. input/output signal waveforms (fig. 6) caution: for the vbs signal, input standard composite video (or sync.) signal applicable to the operating mode which have ntsc (m) or pal (b-g) and is selected by the ntp signal. dimming backlight by pwm timing chart if using pwm mode, refer to the timing chart shown in fig. 7.
ENH050QA1-320/450/600 original speci? cations created by sharp. 6 display systems division ? hillsboro, or ? (503) 690-2460 ? www.wedc.com white electronic designs corp. reserves the right to change products or speci? cations without notice. january 2006 rev. 1 white electronic designs display systems division input/output signal timing chart (fig. 6) (ckc=high, ntsc: f h =15.7khz, f v =60hz/pal: f h =15.6khz, f v =50hz) parameter symbol min. typ. max. unit reward horizontal sync. output pulse [hsy] pulse width t hs2 3.2 3.9 4.6 s f=f h (18) phase difference t pd 0.4 1.1 1.8 s (19) rise time tr ho - - 0.5 s c l =10pf fall time tf ho - - 0.5 s vertical sync. output pulse [vsy] pulse width t vs - 4h - s 1h=1/f h phase difference tv ho - 11.0 28.0 s (20) rise time tr vo - - 2.0 s c l =10pf fall time tf vo - - 2.0 s vertical phase difference odd ? eld tp v1 - 1h - s 1h=1/f h even ? eld tp v2 - 0.5h - s (21) clock output frequency [ck] ntsc mode f clo - fh x 1201 2 - mhz samc="hi" pal mode f clo - fh x 1209 2 - mhz (22) ntsc mode f clo - fh x 1201 6 - mhz samc="lo" pal mode f clo - fh x 1209 6 - mhz (23) (supply voltage conditions: vsh = +8.0v, vsl = 5.0v) notes: 18. adjusted by variable resister (h-pos) in a module. 19. variable by variable resister (h-pos) in a module. adjustment : tpd = 1, 1 0.7 s 20. synchronized with hsy, based on falling timing of hsy. 21. vsy signal delays 22. independent sampling mode. 23. simultaneous sampling mode. display time range ntsc (m) mode (ntp=high, ckc=high) displaying the following range within video signals. ? horizontally: 12.2 ~ 63 s from the falling edge of hsy. (sam=high) 12.3 ~ 62.9 s from the falling edge of hsy. (sam-low) ? vertically: 20 ~ 253 h from the falling edge of vsy. pal(b-g) mode (ntp-low, ckc=high) displaying the following range within video signals. ? horizontally: 13.0 ~ 63.8 s from the falling edge of hsy. (sam=high) 13.1 ~ 63.7 s from the falling edge of hsy. (sam-low) ? vertically: 26 ~ 298 h from the falling edge of vsy. however, the video signals of (14n+12)h, (14n+20) h/even ? eld. (14n+17)h, (14n+23) h/odd ? eld (n=1, 2..., 20) are not displayed on the module. external clock mode (ntp=high, ckc='lo') ? horizontally: 205 ~ 1164 ck from the falling edge of hsy. (sam=high) 84 ~ 403 ck from the falling edge of hsy. (sam-low) (ck means input external clock.) ? vertically: 20 ~ 253 h from the falling edge
ENH050QA1-320/450/600 original speci? cations created by sharp. 7 display systems division ? hillsboro, or ? (503) 690-2460 ? www.wedc.com white electronic designs corp. reserves the right to change products or speci? cations without notice. january 2006 rev. 1 white electronic designs display systems division optical characteristics t a =25c parameter symbol condition min typ max unit remarks viewing angle range ? 11 cr>5 60 65 - (degree) (1,2) ? 12 35 40 - (degree) ? 2 60 65 - (degree) contrast ratio crmax optimal 60 - - - (2,3) response time rise t r = 0 - 30 60 ms (2,4) fall t d - 50 100 ms luminance im film y l i l =6.5marms 240 320 - cd/m 2 (5) im+rp 360 450 - im+rpp 480 600 - white chromaticity x i l =6.5mtvms 0.263 0.313 0.363 - yi l =6.5marms 0.273 0.329 0.379 - lamp life time +25c - continuation 10,000 - - hour (6) -30c - intermission 2,000 - - time (7) dc/ac inverter for external connection shown in following. harison electric co., ltd, hiu-288. notes: 1. viewing angle range is de? ned as follows. fig. 1: de? nition of viewing angle 6 o'clock direction ? 2 ? 2 ? 12 ? 11 normal line 2. applied voltage conditions: a. vcdc is adjusted so as to attain maximum contrast ratio. b. brightness adjusting voltage (brt) is open. c. input video signal of standard black level and 100% white level. 3. contrast ratio is de? ned as follows: contrast ratio (cr)= photodetector output with lcd being "white" photodetector output with lcd being "black"
ENH050QA1-320/450/600 original speci? cations created by sharp. 8 display systems division ? hillsboro, or ? (503) 690-2460 ? www.wedc.com white electronic designs corp. reserves the right to change products or speci? cations without notice. january 2006 rev. 1 white electronic designs display systems division 4. response time is obtained by measuring the transition time of photodetector output, when input signals are applied so as to make the area "black" from "white" and "white" from "black". 5. measured on th ecenter area of the panel at a viewing cone 1 by topcon luminance meter bm-7. (after 30 minutes operation) dc/ac inverter driving frequency : 49khz 6. lamp life time is de? ned as the time when either "a" or "b" occurs in the continuous operation under the condition of lamp current il=3~7. 0marms and pwm dimming 100%~5%. (ta=25c) a. brightness becomes 50% of the original value. b. kick off voltage at ta=30c exceeds maximum value, 1500vrms. 7. the intermittent cycle is de? ned as a time when brightness becomes 50% of the original value under the condition of followi ng cycle. ambient temperature: -30c 100% 90% 10% 0% white white black time t r t d photodetector output (relative value) high (6.5marms) off 5 min. 5 min. 5 min. 5 min.
ENH050QA1-320/450/600 original speci? cations created by sharp. 9 display systems division ? hillsboro, or ? (503) 690-2460 ? www.wedc.com white electronic designs corp. reserves the right to change products or speci? cations without notice. january 2006 rev. 1 white electronic designs display systems division mechanical characteristics by applying pressure on the active area it is possible to cause damage to the display. input/output connectors performance input/output connectors for the operation of lcd module (fpc connector 22 pin) - applicable fpc shown in fig. 3. - terminal holding force: more than 0.9n/pin. (each terminal is pulled out at a rate of 25 3mm/min.) 5 min 23.0 21 +0.1 -0.1 1.0 +0.15 -0.15 (r0.5) 0.7 +0.07 -0.05 1.0 +0.02 -0.02 +0.15 -0.15 6 min 0.3 4 +0.05 -0.05 1 3 2 no. name materials 1 base material polyimide or equivalent material (25m thick) 2 copper foil copper foil (35m thick) solder plated in 2 to 12m 3 cover lay polyimide or equivalent material 4 reinforcing plate polyester polyimide or equivalent material (188m thick) (fig. 3) fpc applied to input/output connector (1.0mm pitch) i/o connector of backlight driving circuit symbol used connector corresponding connector manufacturer cn1 bhr=02(8.0)vs-1n sm02(8.0)b-bhs-tb (wire to board) jst sm02(8.0)b-bhs-1n (wire to board) jst bhmr-03v(wire to wire) jst
ENH050QA1-320/450/600 original speci? cations created by sharp. 10 display systems division ? hillsboro, or ? (503) 690-2460 ? www.wedc.com white electronic designs corp. reserves the right to change products or speci? cations without notice. january 2006 rev. 1 white electronic designs display systems division display quality the display quality of the color tft-lcd module shall be in compliance with the incoming inspection standards. handling instructions mounting the module the tft-lcd module is designed to be mounted on equipment using the mounting tabs in the four corners of the module at the rear side. when mounting the module, the m2.6 tapping screw (fastening torque is 0.3 through 0.5n?m) is recommended. make certain to ? x the module on the same plane. avoid warping or twisting the module. precautions in mounting polarizer which is made of soft material and susceptible to ? aws must handled carefully. a protective ? lm (laminator) is applied on the surface to protect it against scratches and dirt. it is recommended to peel off the laminator immediately before use, taking care of static electricity. precautions in peeling off the laminator a) working environment when the laminator is peeled off, static electricity may cause dust to stick to the polarizer surface. to avoid this, the following working environment is desired. a) floor: conductive treatment of 1m ? or more on the title (conductive amt of conductive paint on the tile) b) clean room free from dust and with an adhansive mat on the doorway c) advisable humidity:50%~70% advisable temperature:15c~27c d) workers shall wear conductive shoes, conductive work clothes, conductive gloves and an earth band. if the tft-lcd module metal parts (shielding lid and rear case) become soiled, wipe them with a soft dry cloth. wipe off water spots of ? nger grease immediately. prolonged contact with water may cause discoloration or spots. the tft-lcd module uses glass which breaks or cracks easily if dropped or bumped on a hard surface. handle with care. since cmos lsi is used in this module, take care of static electricity and ground one's body when handling.
ENH050QA1-320/450/600 original speci? cations created by sharp. 11 display systems division ? hillsboro, or ? (503) 690-2460 ? www.wedc.com white electronic designs corp. reserves the right to change products or speci? cations without notice. january 2006 rev. 1 white electronic designs display systems division precautions in adjusting module variable resistor on the rear face of the module has been adjusted optimally before shipmetn. therefore, do not change any adjusted values. if adjusted values are changed, the speci? cations described here may not be satis? ed. caution of product design 1. the lcd module shall be protected against water by the waterproof cover. others 1. do not expose the module to direct sunlight or intensive ultraviolet rays for many hours; liquid crystal is deteriorated by ultraviolet rays. 2. store the module at a temperature near room temperature. when stored at lower than the rated storage temperature, liquid crystal solidi? es, causing the panel to be damaged. when stored at higher than the rated storage temperature, liquid crystal turns into isotropic liquid and may not recover. 3. if lcd panel breaks, the liquid crystal could possibly escape from the panel. since the liquid crystal is injurious, avoid contact with the eyes or mouth. wash with soap immediately if contact with the liquid crystal occurs. 4. observe all other precautionary requirements in handling general electronic components. shipping requirements carton storage conditions: number of layers of carton in stack: 10 layers max environmental conditions: temperature: 0~40c humidity: 60%rh or less (at 40c) no dew condensation at low temperature and high humidity, atmosphere harmful gases such as acid and alkali which corrode electronic components and wires must not be present. storage period approximately 3 months opening of package to prevent tft-lcd module from being damaged by static electricity, adjust the room humidity to 50%rh of higher and make certain one is grounded before opening the package. reliability test reliability test conditions for the tft-lcd module are shown on page 12. and should be strictly avoided. image retention may occur when a ? xed pattern is displayed for a long time. ordering information part number model descriptions contact factory ENH050QA1-320 320 nit -- glossy front surface - im/clear 320 nit -- diffuse front surface - im/110 320 nit -- no front surface treatment 180-0048-00 enh050qa1-450 450 nit -- glossy front surface - im/clear 180-0048-01 450 nit -- diffuse front surface - im/110 180-0048-02 450 nit -- no front surface treatment 180-0060-00 enh050qa1-600 600 nit -- glossy front surface - im/clear 180-0060-01 600 nit -- diffuse front surface - im/110 180-0060-02 600 nit -- no front surface treatment
ENH050QA1-320/450/600 original speci? cations created by sharp. 12 display systems division ? hillsboro, or ? (503) 690-2460 ? www.wedc.com white electronic designs corp. reserves the right to change products or speci? cations without notice. january 2006 rev. 1 white electronic designs display systems division reliability test items for tft-lcd module no. test items test conditions 1 high temperature storage test t p =-85c 2 low temperature storage test t p =-30c 3 high temperature and high humidity operating test t p =-60c, 90~95%rh 4 high temperature operating test t p =-85c 5 low temperature operating test t p =-30c 6 electrostatic discharge test =200v ? 200pf(o ? ) 7 shock test 980m/s 2 6ms. 8 vibration test frequency range: 8~33.3hz stroke: 1.3mm sweep: 33.3hz~400hz acceletation: 28.4m/s 2 frequency: 15 minutes 2 hours for each direction of x, z (1) 4 hours for direction of y (8 hours in total) 9 heat shock test -30c~-85c/200 cycles (0.5h) (0.5h) 240h 240h 240h 240h 240h once for each terminal x, y, z 3 times for each direction (jis c0041. a-7 condition c) t p =panel temperature evaluation result criteria: note 1: direction of x, y, z is de? ned as follows: x z y 6 o' clock direction 1 2 o' clock direction
ENH050QA1-320/450/600 original speci? cations created by sharp. 13 display systems division ? hillsboro, or ? (503) 690-2460 ? www.wedc.com white electronic designs corp. reserves the right to change products or speci? cations without notice. january 2006 rev. 1 white electronic designs display systems division 11 03a outline dimensions screen size (102.24 x 74.763) screen center r g r g b 960h x 234v dots 126.8 0.3 107.4 (case open area) 89.6 0.3 42.4 9.5 13 3 3 31.2 datum line datum line 16.5 13 2.2 2.2 5 5 79.8 (case open area) direction of best viewing angle (6 o'clock) 0.2 89.2 +0.3 -0.2 13 +0.3 -0.2 +0.3 -0.2 +0.1 -0.1 89.9 max +0.3 -0.2 rear view
ENH050QA1-320/450/600 original speci? cations created by sharp. 14 display systems division ? hillsboro, or ? (503) 690-2460 ? www.wedc.com white electronic designs corp. reserves the right to change products or speci? cations without notice. january 2006 rev. 1 white electronic designs display systems division tft-lcd panel source driver gate driver common driving signal (com) lcd driving signal backlight backlight driving signal video interface circuit backlight * driving circuit (caution) * not included in the module v hl power supply for backlignt v cdc brt rgb video signal 2 rgb video signal 1 v bs ntp vsw vsy hsy ck ckc gnd power supply v sh , v sl v sh v sh v sl +5.3v regulator gate driver power supply gate driver power supply circuit control circuit source driver driving signal gate driver driving signal frp hsy v sw syn fig. 4 circuit block diagram of tft-lcd module sync. separator amplifying polarity inversion
ENH050QA1-320/450/600 original speci? cations created by sharp. 15 display systems division ? hillsboro, or ? (503) 690-2460 ? www.wedc.com white electronic designs corp. reserves the right to change products or speci? cations without notice. january 2006 rev. 1 white electronic designs display systems division i/o signals (gray scale) a : b: c: d: e: f: g: 1v pp gnd under hv 0.7v pp 5v 0.7v pp 0 5v 0 5v 0 5v 0 (input) (note) input impedance of a, b, d: >10k ? input impedance of c: >50k ? e f c b d g a -5v +8v horizontal sync. vertical sync. clock -5v +8v +5v sw sw i/o connector fig. 5 recommended circuit tft-lcd module c-mos lsi c-mos lsi c-mos lsi +5.3v driver ics driver ics ic com +5.3v ic ic c-mos lsi +8v -5v regulator hsy vsy pwm n/p hrv vrv vsw sam v cdc vsh vbs brt vri vgi vbi vsl vr2 vg2 vb2 gnd clkc clk 560 ? 560 ? 560 ? 560 ? 560 ? 560 ? 1k ? 1k ? i 560 ? 8.2k ? 10k ? +5.3v 0.01xf 0.01xf 0.01xf 0.01xf 0.01xf 0.01xf 10k ? 2k ? 8.2k ? 50k ? 15k ? 47k ?
ENH050QA1-320/450/600 original speci? cations created by sharp. 16 display systems division ? hillsboro, or ? (503) 690-2460 ? www.wedc.com white electronic designs corp. reserves the right to change products or speci? cations without notice. january 2006 rev. 1 white electronic designs display systems division v bs v sy hsy video (r,g,b) hsy v sy 3h (ntsc) 2.5h (pal) 16.7ms (ntsc) 20ms (pal) odd field even field 1.0 vp-p detailed 0.7 vp-p 19h (ntsc) 25h (pal) vertical display period: 234h (ntsc) 273h (pal) fig. 6-a input/output signal waveforms (ckc= "high") t pv1 t vs t pv2 t r vo t f ho t r ho t f vo t v ho t v ho
ENH050QA1-320/450/600 original speci? cations created by sharp. 17 display systems division ? hillsboro, or ? (503) 690-2460 ? www.wedc.com white electronic designs corp. reserves the right to change products or speci? cations without notice. january 2006 rev. 1 white electronic designs display systems division vbs hsy video signal vr1~vb1 or vr2~vb2 fig. 6-b input/output signal waveforms (ckc="high") t hs1 t pd t hs2 50% 50% 10% 90% t f h0 t r h0 1h=63.5 s (ntsc) 1h=64.0 s (pal) horizontally display area 50.8 s (sam "high") horizontally display area 50.6 s (sam "low") 12.2 s (ntsc, sam high) 13.0 s (ntsc, sam high) 12.3 s (ntsc, sam low) 13.4 s (ntsc, sam low)
ENH050QA1-320/450/600 original speci? cations created by sharp. 18 display systems division ? hillsboro, or ? (503) 690-2460 ? www.wedc.com white electronic designs corp. reserves the right to change products or speci? cations without notice. january 2006 rev. 1 white electronic designs display systems division ntsc mode system clock simultaneous sampling mode (pixel clock) independent sampling mode (dot clock) hsy system clock simultaneous sampling mode (pixel clock) independent sampling mode (dot clock) hsy pal mode 1185 1190 1195 1200 0 5 10 52.9 ns reset reset 1185 1190 1195 1200 0 1205 fig. 6-c input/output signal waveforms (clkc="high")
ENH050QA1-320/450/600 original speci? cations created by sharp. 19 display systems division ? hillsboro, or ? (503) 690-2460 ? www.wedc.com white electronic designs corp. reserves the right to change products or speci? cations without notice. january 2006 rev. 1 white electronic designs display systems division ck hsy hsy hsy hsy vsy vsy tr cli tf cli t h01 t su1 t wl t wh tf h12 tr h12 t hi tr vo tf vo t h02 t su2 1h fig. 6-d input/output signal waveforms (external clock mode ntp="high", ckc="low")
ENH050QA1-320/450/600 original speci? cations created by sharp. 20 display systems division ? hillsboro, or ? (503) 690-2460 ? www.wedc.com white electronic designs corp. reserves the right to change products or speci? cations without notice. january 2006 rev. 1 white electronic designs display systems division vsy vsy hsy pwm (ntsc) pwm (pal) pwm magnify time range 89h 105h 525h (ntsc) 625h (pal) 1h nh nh 1/2h 1/2h 105h (ntsc) 89h (pal) period of stop dc/ac inverter oscillation period of dc/ac inverter oscillation fig. 7 pwm signal waveform for dimming backlight
ENH050QA1-320/450/600 original speci? cations created by sharp. 21 display systems division ? hillsboro, or ? (503) 690-2460 ? www.wedc.com white electronic designs corp. reserves the right to change products or speci? cations without notice. january 2006 rev. 1 white electronic designs display systems division fig. 9 optical characteristics brightness: less than 5000cd/m 2 wave length: to be cut less than 400nm normal line photodetector (including luminosity factor) polarizing filter frame backlight (plane source) lcd panel adjusting method of optimum common electrode dc bias voltage to obtain optimum dc bias voltage of common electrode driving signal (vcdc). photo-electric devices are very effective, and the accuracy is within 0.1v. (in visual examination method, the accuracy is about 0.5v because of the difference amoung individuals.) to gain optimum common electrode dc bias voltage, there is the following method which uses the photoelectric device. (measurement of ? icker) dc bias voltage is adjusted so as to minimize ntsc: 60hz (30hz) pal: 50hz (25hz) ? icker. output voltage v cdc lcd oscilloscope (x-y recorder) photo-electric device fig. a measurement system photo-electric output voltage is measured by an oscilloscope at a system shown in fig. a. dc bias voltage must be adjusted so as to minimize the ntsc:60hz(30hz) pal:50hz(25hz) ? icker with dc bias voltage changing slowly. (fig. b) dc bias: optimum dc bias: optimum + 1v fig. b waveforms of flicker

▲Up To Search▲

Price & Availability of ENH050QA1-320

	To Download ENH050QA1-320 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .